Mp-Intro and Architecture 1
Mp-Intro and Architecture 1
SYLLUBUS
Internal architecture of 8085
microprocessor
Functional block diagram
Instruction set
Addressing modes
Classification of instructions
Status flags
Machine cycles and T states
Fetch and execute cycles
MICROPROCESSOR
• 8-bitregister
Receive data from data bus
and hold for ALU, stores
operands of ALU operation
GENERAL PURPOSE REGISTER
An array of 6 number of registers of 8bits –
arranged in pair
B&C
D&E
H &L
.Like RAM with addressable memory
locations
Each register alone used to store -8 bit of data
16-BIT register
16-bit register
S 7 Z 6 X 5 AC 4 X 3 P 2 X 1 CY 0
SIGN FLAG
IF MSB of result of operation has value 1,the flag is set, others reset
ZERO FLAG
If the result of instruction has value zero, Z flag set
CARRY FLAG
If instruction resulted in carry or borrow out of higher order bit, this flag is
set
PARITY FLAG
When the result of operation contains even number of 1’s-pf set
odd number of 1’s -reset