Lecture 7a

Digital Logic - Functions of Combinational Circuits

What are Combinational Circuits ??

• It is also sometimes referred to as time-independent logic.

• This is in contrast to sequential logic, in which the output depends not only on the present input but also on the
history of the input.

• In other words, sequential logic has memory while combinational logic does not have memory.
Applications of Combinational Circuits
• Combinational logic is used in computer circuits to perform Boolean algebra on input signals and on stored data.
• Practical computer circuits normally contain a mixture of combinational and sequential logic.

E.g. The part of an arithmetic logic unit, or ALU, that does mathematical calculations is constructed using combinational
logic.
• Other circuits used in computers, such as half adders, full adders, half subtractors, full subtractors, multiplexers,
demultiplexers, encoders and decoders are also made by using combinational logic.

1 Half Adders
Basic Adders
• The basic rules of Boolean addition are as
0+0=0
0+1=1
1+0=1
1+1=10
• The above operations are performed by a logic circuit called a half-adder.
The half-adder (HA) accepts two binary digits on its inputs and produces two binary digits on its outputs, a sum bit
and a carry bit.

Half Adder

2 Full Adder
The full-adder (FA) accepts two input bits and an input carry and generates a sum output and an output carry.
The basic difference between a FA and a HA is that the FA accepts an input carry.

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 (a) Logic symbol for a half-adder. (b) Half-adder truth table. (c) Half Adder Logic Diagram

Figure 1: Half-adder.

(a) Logic symbol for a full-adder. (b) Full Adder Truth Table. (c) Full Adder Logic Diagram

(d) Full Adder with two Half Adder

Figure 2: Full-adder.

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3 Parallel Binary Adders
• The serial addition method uses only one FA circuit and a storage device to hold the generated output carry and sum.
• The parallel method uses n FA circuits.
• A binary parallel adder is a digital function that produces the arithmetic sum of two binary numbers in parallel.
• The addition of two binary number in parallel implies that all the bits of the augend and the addend are available
for computation at the same time.
• The signal must propagate through the gates before the correct output sum is available in the output terminals.

3.1 Ripple-Carry adder

Block Diagram for a 4-Bit Parallel Adder

• A group of four bits is called a nibble.

Carry Propagation

• The signal from the Carry (Ci ) to the output carry (Ci+1 ) propagates through 2 gate levels.

• The total propagation time is equal to the propagation delay of a typical gate times the number of gate levels in the
circuit.
• For an n-bit parallel adder, there are 2n gate levels from the carry to propagate through.
• The worst-case delay of the RCA is when a carry signal transition ripples through all stages of adder chain from the
LSB to the MSB
t = (n − 1)tc + ts
tc = delay through the carry stage of a FA
ts = delay to compute the sum of the last stage
Disadvantage
* The delay of ripple carry adder is linearly proportional to n, the number of bits, therefore the performance of the RCA
is limited when n grows bigger.

Advantage
* The RCA has lower power consumption as well as a compact layout giving smaller chip area.

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3.2 The Look-Ahead Carry Adder
• The speed with which an addition can be performed is limited by the time required for the carries to propagate, or
ripple, through all the stages of a parallel adder.
• One method of speeding up the addition process by eliminating this ripple carry delay is called Look-Ahead Carry
Adder (LACA) addition.
• The LACA anticipates the output carry of each stage, and based on the inputs produces the output carry by either
carry generation or carry propagation.

Carry Generation
• Carry generation occurs when an output carry is produced (generated) internally by the full-adder.
• A carry is generated only when both input bits are 1s.
• The generated carry, Cg is expressed as the AND function of the two input bits, A and B.

Cg = A.B

Carry Propagation
• Carry propagation occurs when the input carry is rippled to become the output carry.
• An input carry may be propagated by the full-adder when either or both of the input bits are 1s.
• The propagated carry, Cp , is expressed as the OR function of the input bits.

Cp = A + B

Illustration of conditions for carry generation (Cg ) and carry propagation (Cp ).
• The output carry of a FA can be expressed in terms of both the generated carry (Cg ) and the propagated carry (Cp ).
• The output carry (Cout ) is a 1 if the generated carry is a 1 OR if the propagated carry is a 1 AND the input carry
(Cin ) is a 1.
∴ We get an Cout of 1 if it is generated by the FA (A = 1 AND B = 1) OR if the FA propagates the Cin (A = 1 OR B
= 1) AND Cin = 1.
• This relationship is expressed as
Cout = Cg + Cp .Cin
Example : 4 Bit Parallel Adder

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 Cg and Cp in terms of the input bits to a 4-bit adder.
BRAINSTORMING : Express Cout1 , Cin2 , Cout2 , . . . , Cin4 , Cout4 in terms of A1 , B1 , . . . , A4 , B4
BRAINSTORMING : Answer