EE1372 Analog Electronics Department of EEE/EIE 2022-2023

UNIT IV- APPLICATIONS OF OP-AMP

PART – B
1. (i) Draw circuit of II order Butterworth active low pass filter and derive its transfer
function. (Dec 2017)

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2. Design a first order low pass filter for a high cut off frequency of 1 KHz and pass band
gain of 2. (May 2013, May 2016)

3. Design a second Butterworth order low pass filter for a high cut off frequency of 2 KHz.
(May 2017) (Probable Part C)

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4. With circuit diagram, explain the following applications of operational amplifier
(i) Peak detector
(ii) Monostable multivibrator.

(i) Peak detector

Peak detector circuit is used to get the peak value of voltage of an input signal fed into the peak
detector circuit. The peak detector circuit consists of a comparator circuit, diode and a
MOSFET reset switch.
The diode is connected in such a way that, it will be in forward biassed only when the potential
from the output of the comparator circuit is greater than the potential at the output of the peak
detector circuit (The output of peak detector circuit is equal to the capacitor voltage). That is
why we get only the peak value of the input at the output of peak detector circuit.
A MOSFET reset switch is provided to discharge the capacitor. The discharging of the
capacitor will result a zero potential at the capacitor. ie, the output potential of the peak detector
circuit will be zero.
Then the comparator will work in a way by comparing the present input with the zero potential
at the output via diode.
Working
Case 1 (when Vi >Vc)
When the input voltage is greater then the present output voltage which is the capacitor voltage,
then the diode conducts, resulting in voltage follower circuit.
Case 2 (when Vi<Vc)
When the input voltage is less then the present output voltage which is the capacitor voltage,
then the diode is in reverse biased condition, resulting in high impedance state, maintaining the
previous output at the output at the peak detector circuit output due to the charging of capacitor.

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Consider an input signal Vi as shown above, as the diode remains in forward biased
state till reaching the point P shown in the waveform, the capacitor charges upto the peak value
of the input signal. When the peak value is obtained once the output should maintain the peak
value until another peak value appears at the input.
To avoid the lover voltage levels, a diode is given in between the comparator and
capacitor. The diode transmit only the peak value of voltage when compared to the voltage of
the capacitor.
Here, the voltage at point P is maintained until another greater peak value when
compared to the present peak value occurs at the input. The voltage at P is maintained until
another greater peak value occurs at point Q, which is maintained till the next peak value of
voltage appears at the input due to the action of capacitor.

(ii) Monostable multivibrator

 The diode 𝐷1 is clamping diode connected across c. the diode clamps the capacitor voltage to
0.7 v when the output is at +𝑉𝑠𝑎𝑡.A narrow negative triggering pulse v1 is applied to the non
inverting input terminal, through diode D2

 The ouput v0 is at +vsat in its stable state

 The diode D1 conducts and the voltage arcoss the capacitor get clamped to 0.7 V
 The voltage at the non inverting input terminal is controlled by potentiometric divider of
R1R2to 𝛽𝑉0 in the stable state.
 If negative trigger is applied to the non-inverting terminal, then the output of the op-

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ampchanges its state from +vsatto -vsat.
 The diode is now reverse biased and the capacitor starts charging exponentially to -vsat.
 When the capacitor voltage becomes more negative than −𝛽𝑉0, The output of the op-
ampchanges its state back to +vsat.
Expression for Pulse width
Vi = Initial Value , Vf = Final Value
The Output voltage is 𝑉0 = 𝑉𝑓 + (𝑉𝑖 − 𝑉𝑓)𝑒−𝑡⁄𝑅𝐶

From the waveform,

Vf = -Vsat
Vi = VD1
V0 = Vc
𝑉𝐶 = −𝑉𝑠𝑎𝑡 + (𝑉𝐷1 − [−𝑉𝑠𝑎𝑡])𝑒−𝑡⁄𝑅𝐶
At t = T,
𝑉𝐶 = −𝛽𝑉𝑠𝑎𝑡
Therefore,
−𝛽𝑉𝑠𝑎𝑡 = −𝑉𝑠𝑎𝑡 + (𝑉𝐷1 − [−𝑉𝑠𝑎𝑡])𝑒−𝑡⁄𝑅𝐶
(𝑉𝐷1 + 𝑉𝑠𝑎𝑡)𝑒−𝑡⁄𝑅𝐶 = 𝑉𝑠𝑎𝑡(1 − 𝛽)
𝑉𝑠𝑎𝑡(1 − 𝛽)
𝑒−𝑡⁄𝑅𝐶 =
𝑉𝐷1 + 𝑉𝑠𝑎𝑡
1 + 𝑉𝐷1⁄𝑉𝑠𝑎𝑡
𝑇 = 𝑅𝐶 ln [ ]
1−𝛽
The potential divider decides the value of 𝛽 given by
𝑅2
𝛽=
𝑅1 + 𝑅2
If 𝑉𝑠𝑎𝑡 ≫ 𝑉𝐷1 𝑎𝑛𝑑 𝑅1 = 𝑅2 , 𝑡ℎ𝑒𝑛 𝛽 = 0.5
𝑇 = 0.69 𝑅𝐶
5. With circuit diagram, explain the I/V and V/I converter (May 2013)
Voltage to Current Converter with floating loads (V/I):
1. Voltage to current converter in which load resistor RL is floating (not connected to ground).
2. Vin is applied to the non inverting input terminal, and the feedback voltage across R1 devices the
inverting input terminal.

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3. This circuit is also called as a current – series negative feedback amplifier.
4. Because the feedback voltage across R1 (applied Non-inverting terminal) depends on the output
current i0 and is in series with the input difference voltage Vid .

R1

From the fig. input voltage Vin is converted into output current of Vin/R1 [Vin -> i0 ] . In other words,
input volt appears across R1. If R1 is a precision resistor, the output current (i0 = Vin/R1 ) will be
precisely fixed.
Applications: 1. Low voltage ac and dc voltmeters 2. Diode match finders 3. LED 4. Zener diode testers.

I to V Convereter:

I/V Convereter

Sensitivity of the I – V converter:

1. The output voltage V0 = -RF Iin.
2. Hence the gain of this converter is equal to -RF . The magnitude of the gain (i.e) is also called as
sensitivity of I to V converter.
3. The amount of change in output volt ∆V0 for a given change in the input current ∆Iin is decide by the
sensitivity of I-V converter.
4. By keeping RF variable, it is possible to vary the sensitivity as per the requirements.
6. With circuit diagram explain the following applications of op amp.
i) Clippers and Clampers.(Nov/Dec 2019)
ii) Triangular waveform generator. (May 2017, May 2018)
i) Clipper
 A precision diode may also be used to clip-off a certain portion of the input signal to
obtain adesired output waveform.
 The clipping level is determined by the reference voltage and could be obtained
fromthe positive supply voltage.
It can be seen that the portion of the output voltage for V0>Vref are clipped off.

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Clamper(May 2019)

The clamper is also known as dc inserter or restorer. The circuit is used to add a desired dc
level to the output voltage. In other words, the output is clamped to a desired dc level.

 If the clamped dc level is positive, it is called positive clamper.

 Similarly if the clamped dc level is negative, the damper is called negative clamper.

(ii)Triangular waveform generator (May 2019)

 Triangular waveform is generated by alternatively charging and discharging the capacitor.
 This is achieved by connecting integrator circuit at the output of square wave generator.

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Assume that V’ is high at +Vsat. This forces a constant current (+Vsat/R3) through C (left
to right) to drive Vo negative linearly. When V’ is low at —Vsat, it forces a constant
current (— Vsat /R3) through C (right to left) to drive Vo positive, linearly. The frequency
of the triangular wave is same as that of square wave. This is illustrated in Figure below.

7. Explain the operation of Astable multivibrator using op-amp. (Nov 2013, Dec 2018)
Astable multivibrator using opamp:
 In this we are going to see about astable multivibrator operation using op-amp. Figure shows
astable multivibrator circuit using op-amp.
 It looks like a comparator with hysteresis (Schmitt trigger), except the input voltage is
replacedby a capacitor.
 The circuit has a time dependent elements such as resistance and capacitor to set the
frequencyof oscillation.

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8. Explain the operation of a square wave generator by drawing the capacitor and output
voltage waveforms. (May 2013)
square wave generation
Square wave generator can be constructed using Schmitt trigger inverters like TTL. It is the
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easy way to make a basic astable waveform generator. While producing clock or timing signals,
this astable multivibrator produces a square wave generator waveform that switches between
HIGH and LOW .As we know output of a Schmitt inverter is the opposite or inverse to that of
its input. By giving hysteresis it can change state at different voltage levels. It uses a Schmitt
trigger action that changes state between an upper and lower threshold level as the input voltage
signal, increases and decreases about the input terminal. Here upper threshold level sets output
and the lower threshold level resets the output.

This simple square wave generator circuit consists of a single TTL 74LS14 Schmitt inverter
logic gate with a capacitor connected between its input terminal and ground and the positive
feedback required for the circuit to oscillate being provided by the feedback resistor.Assume
that the charge across the capacitor plates is below the Schmitt’s lower threshold level.
Therefore makes the input to the inverter at a logic ZERO level, resulting in a logic ONE output
level.

Working of Square Wave Generator:

The resistor is now connected to the logic ONE level output while the other side of the resistor
is connected to the capacitor, which is at a logic ZERO level. The capacitor is now starting to
charge up in a positive direction through the resistor at a rate determined by the RC time
constant of the combination. While the charge across the capacitor reaches the upper threshold
level of the Schmitt trigger and the output from the Schmitt inverter rapidly changes from a
logic level ONE to a logic level ZERO state and the current flowing through the resistor
changes direction.

The integral of a constant say ‘C’ will be ‘C’ multiple of t, where t is time across which the
integration is taken place means that a positive constant will give a positive ramp and a
negative constant will integrate to a negative ramp. By adding them together we get a
triangle wave, then we got our square wave generator to produce a square wave from
triangular wave. Here change now causes the capacitor that was originally charged up
through the resistor that begin to discharge itself back through the same resistor, until the
charge across the capacitor plates reaches the lower threshold level. The inverter output
switches states again with the cycle repeating itself over and over again as long as the supply
voltage is present.

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9. Design a wein bridge oscillator for a frequency of 5 KHz. Assume C=0.01 micro farad.

10. In a triangular wave generator given R2 = 1.2KΩ, R3 = 6.8 KΩ, R1 = 120KΩ, C1=0.01µF.
Determine peak to peak output amplitude of triangular wave and frequency of triangular
wave. (Probable Part C)

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11. With neat diagram explain the working of weighted resister type DAC. (Dec 2017)

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13. With circuit diagram, discuss the following applications of operational amplifier: (i) R-
2R ladder type D/A Converter
R-2R ladder type D/A Converter:
 Wide range of resistors are required in binary weighted resistor type DAC. This can be
avoidedby using R-2R ladder type DAC where only two values of resistors are required.
 It is well suited for integrated circuit realization.
 The typical value of R ranges from 2.5 kΩ to 10 kΩ.
 For simplicity, consider a 3-bit DAC as shown in Fig. 10.5 (a), where the switch position
d1d, d3 corresponds to the binary word 100.
 The circuit can be simplified to the equivalent form of Fig. 10.5 (b) and finally to
Fig10.5(c).Then, voltage at node C can be easily calculated by the set procedure of
network analysis as

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14. Describe about the following with neat diagram: i) SAR Type (May 2016) (Nov/Dec
2019) and ii) Flash ADC.
successive approximation type A/D converter

 The design of this ADC has a very special counter circuit known as a successive-
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approximationregister.
 Instead of counting up in binary sequence, this register counts by trying all values of bits
starting with the most-significant bit and finishing at the least-significant bit.
 Throughout the count process, the register monitors the comparator’s output to see if the
binarycount is less than or greater than the analog signal input, adjusting the bit values
accordingly.
 The way the register counts is identical to the “trial-and-fit” method of decimal-to-binary
conversion, whereby different values of bits are tried from MSB to LSB to get a binary
numberthat equals the original decimal number.
 The advantage to this counting strategy is much faster results: the DAC output converges on
the analog signal input in much larger steps than with the 0-to-full count sequence of a regular
counter.

The Parallel Comparator (Flash) A/D converter

 This is the simplest possible A/D converter. It is at the same time, the fastest and
mostexpensive technique.
 Figure 10.10 (a) shows a 3-bit A/D converter. The circuit consists of a resistive
dividernetwork, 8 op-amp comparators and a 8-line to 3-line encoder (3-bit priority
encoder).
 The comparator and its truth table is shown in Fig. 10.10 (b).
 A small amount of hysteresis is built into the comparator to resolve any problems that might
occur if both inputs were of equal voltage as shown in the truth table.
 At each node of the resistive divider, a comparison voltage is available. Since all the resistors
are of equal value, the Voltage levels available at the nodes are equally divided between the
reference voltage VR and the ground.
 The purpose of the circuit is to compare the analog input voltage vawith each of the node
voltages.

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15. Discuss the application of Op-amps, with necessary equivalent circuits and expressions
for ( i ) D / A converter (ii) A/D converter. (May 2019)
REFER Q.NO. 11, 13, 14

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