DLC-LAB-Report-10
DLC-LAB-Report-10
AMERICAN INTERNATIONAL
UNIVERSITY-BANGLADESH
Faculty of Engineering
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Group Name/No.: 06
Table of Contents
Title 2
Introduction 2
Theory and methodology 2-5
Apparatus 5
Experimental Procedure 5
Hardware Implementation 6
Simulations 7-9
Discussion 10
Conclusion 10
References 10
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1. Introduction:
This lab describes the design of a Digital to Analog Converter (DAC). Two types of
design are shown in this lab, binary weighted DAC and R/2R ladder DAC design.
Finally, student will compare both the design to conclude which design is efficient and
why.
One common requirement in electronics is to convert signals back and forth between
analog and digital forms. Most such conversions are ultimately based on a digital-to-
analog converter circuit. Therefore, it is worth exploring just how we can convert a
digital number that represents a voltage value into an actual analog voltage.
Digital-to-Analog Converters
DACs and their inverse, ADCs, are part of an enabling technology that has contributed
greatly to the 'digital revolution'. To illustrate this, consider a typical long-distance
telephone call. The caller’s voice is converted into an analog electrical signal by a
microphone. The analog signal is then converted to a digital stream by an ADC. That
digital stream is then divided into packets where it will be mixed with other digital data,
not necessarily audio. The digital packets are then sent to the destination, but each
packet may take a completely different route and may not even arrive at the destination
in the correct time order. The digital voice data is then extracted from the packets and
assembled into a digital data stream. A DAC converts it into an analog electrical signal
which drives an audio amplifier which in turn drives a loudspeaker which finally
produces sound. Of course, this is a simplified and stylizeddescription, but it does
illustrate one vital role of ADCs and DACs.
There are several DAC architectures; the suitability of a DAC for a particular
application is determined by six main parameters: physical size, power consumption,
resolution, speed, accuracy, cost. Due to the complexity and the need for precisely
matched components, all but the most specialist DACs are implemented as integrated
circuits (ICs). Digital-to-analog conversion can degrade a signal, so a DAC should be
specified that that has insignificant errors in terms of the application.
DACs are commonly used in music players to convert digital data streams into analogue
audio signals. They are also used in televisions and mobile phones to convert digital
video data into analog video signals which connect to the screen drivers to display
monochrome or color images. These two applications use DACs at opposite ends of the
speed/resolution trade-off. The audio DAC is a low-speed high resolution type while the
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video DAC is a high-speed low to medium resolution type. Discrete DACs would
typically be extremely high-speed low-resolution power- hungry types, as used in
military radar systems. Very high-speed test equipment, especially sampling
oscilloscopes, may also use discrete DACS.
A digital-to-analog converter, or DAC for short, converts a digitally coded number to a voltage
proportional to the number. For example, if a number N is supplied to a DAC, the output voltage
will be proportional to N: Vout = N × B The constant of proportionality, B, is normally
determined from the ratio of the reference voltage, V ref, and the maximum value that N can
have, Nmax, B = Vref / Nmax so that Vout = Vref N / Nmax A common way to make a DAC is with an
OpAmp circuit. Recall the circuit for the summing amplifier.
The following circuit is a basic digital-to-analog (D to A) converter. It assumes a 4-bit binary number
in Binary-Coded Decimal (BCD) format, using +5 volts as a logic 1 and 0 volts as a logic 0. It will
convert the applied BCD number to a matching (inverted) output voltage. The digits 1, 2, 4, and 8
refer to the relative weights assigned to each input. Thus, 1 is the Least Significant Bit (LSB) of the
input binary number, and 8 is the Most Significant Bit (MSB).
Unfortunately, there are several practical problems with this circuit. First, most digital
logic gates do not accurately produce 0 and +5 volts at their outputs. Therefore, the
resulting analog voltages will be close, but not really accurate. In addition, the different
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input resistors will load the digital circuit outputs differently, which will almost
certainly result in different voltages being applied to the summer inputs.
This improved circuit overcomes the problem of using many resistors. Instead it uses
onlytwo valued resistor.
The circuit above performs D to A conversion a little differently. Typically the inputs are
driven by CMOS gates, which have low but equal resistance for both logic 0 and logic
1. Also, if we use the same logic levels, CMOS gates really do provide +5 and 0 volts
for theirlogic levels.
The input circuit is a remarkable design, known as an R-2R ladder network. It has
severaladvantages over the basic summer circuit we saw first:
1. Only two resistance values are used anywhere in the entire circuit. This means that
only two values of precision resistance are needed, in a resistance ratio of 2:1. This
requirement iseasy to meet, and not especially expensive.
2. The input resistance seen by each digital input is the same as for every other input.
The actual impedance seen by each digital source gate is 3R. With a CMOS gate
resistance of 200 ohms, we can use the very standard values of 10k and 20k for our
resistors.
3. The circuit is indefinitely extensible for binary numbers. Thus, if we use binary
inputs instead of BCD, we can simply double the length of the ladder network for an 8-
bit number (0 to 255) or double it again for a 16-bit number (0 to 65535). We only need
to add two resistorsfor each additional binary input.
Apparatus:
Good
1 Digital trainer board 1
condition
2 Resistors 14 Good
condition
Experimental Procedure:
1) The Binary Weighted Digital to Analog converter was set up as shown in Fig. 1 on the
trainer board.
2) The following sequence 1010 to D0, D1, D2, and D3, were given respectively. The
output was observed on the oscilloscope screen.
3) After that, the R-2R ladder was set on the trainer board.
4) Step 2 were repeated for R-2R DAC.
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Hardware Implementation:
(i) Binary Weighted Digital-to-Analog Converter:
D3 D2 D1 D0 Output
0 0 0 0 0V
0 0 0 1 0.622V
0 0 1 0 1.247V
0 0 1 1 1.872V
0 1 0 0 2.497V
0 1 0 1 3.122V
0 1 1 0 3.747V
0 1 1 1 4.372V
1 0 0 0 4.997V
10
1 0 0 1 5.622V
1 0 1 0 6.247V
1 0 1 1 6.872V
1 1 0 0 7.497V
1 1 0 1 8.122V
1 1 1 0 8.747V
1 1 1 1 9.372V
D3 D2 D1 D0 Output
0 0 0 0 0V
0 0 0 1 0.514V
0 0 1 0 1.291V
0 0 1 1 1.808V
0 1 0 0 2.714V
0 1 0 1 3.232V
0 1 1 0 4.008V
0 1 1 1 4.526V
1 0 0 0 5.496V
1 0 0 1 6.014V
1 0 1 0 6.791V
1 0 1 1 7.308V
1 1 0 0 8.214V
1 1 0 1 8.732V
1 1 1 0 9.508V
1 1 1 1 10V
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Discussion :
In our lab the design and functionality of both the binary weighted DAC and the R/2R ladder DAC, it becomes
evident that each possesses distinct advantages and limitations. Firstly, utilizing NI-MULTISIM 13 for simulation, our
lab experimentation was conducted with reliable results. The binary weighted DAC offers simplicity in its design,
utilizing a straightforward approach to convert digital signals into corresponding analog outputs. However, practical
issues arise due to discrepancies in voltage accuracy stemming from variations in digital logic gate outputs and
disparate loading effects on the input resistors. These challenges may compromise the precision of the generated
analog voltages, thereby impacting the overall performance of the converter. On the contrary, the R/2R ladder DAC
presents a more refined solution to digital-to-analog conversion by leveraging a structured network of resistors. This
configuration mitigates issues related to voltage accuracy and loading effects, offering consistent impedance across
digital inputs. Furthermore, the scalability of the R/2R ladder design facilitates the extension of its functionality to
accommodate larger binary numbers without significant complexity or cost implications. Such adaptability aligns well
with diverse application requirements, providing flexibility and efficiency in signal processing tasks. However, it is
essential to acknowledge that both designs entail trade-offs concerning factors such as component precision, cost, and
circuit complexity. While the R/2R ladder DAC excels in terms of impedance uniformity and scalability, it may entail
higher component costs compared to the binary weighted DAC. Conversely, the binary weighted DAC offers
simplicity and cost-effectiveness but may suffer from accuracy issues and limited scalability in more demanding
applications.
Conclusion :
In conclusion, our comparison between the binary weighted DAC and the R/2R ladder DAC underscores the
importance of considering trade-offs in digital-to-analog converter designs. While the binary weighted DAC offers
simplicity and cost-effectiveness, it may suffer from accuracy limitations. Conversely, the R/2R ladder DAC provides
better accuracy and scalability, albeit with increased complexity and potentially higher costs. The choice between the
two designs depends on the specific requirements and priorities of the application.