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T3 Boolean Algebra

The document provides an overview of Boolean Algebra, its basic operators, and theorems, including the concepts of minterms and maxterms. It explains the application of DeMorgan's Law and the significance of incompletely specified functions in logic design. Additionally, it includes examples and exercises to illustrate the principles of Boolean expressions and their simplifications.

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0% found this document useful (0 votes)
3 views23 pages

T3 Boolean Algebra

The document provides an overview of Boolean Algebra, its basic operators, and theorems, including the concepts of minterms and maxterms. It explains the application of DeMorgan's Law and the significance of incompletely specified functions in logic design. Additionally, it includes examples and exercises to illustrate the principles of Boolean expressions and their simplifications.

Uploaded by

liuyiduo0617
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Topic 3

Boolean Algebra & Optimization

Ve270 Introduction to Logic Design 1


Boolean Algebra

• “Traditional” algebra
– Variables represent real numbers
– Operators operate on variables, and
return real numbers
• Boolean Algebra
– Developed mid-1800’s by George Boole
to formalize human thought
– Variables represent 0 or 1 only
– Operators return 0 or 1 only
– Basic operators
• AND, OR, NOT

Ve270 Introduction to Logic Design 2


Boolean Algebra Terminology
• Example equation: F(a,b,c) = a’bc + abc’ + ab + c
• Variable
– Represents a value (0 or 1)
– Three variables: a, b, and c
• Literal
– Appearance of a variable, in true or complemented form
– Nine literals: a’, b, c, a, b, c’, a, b, and c
• Product term
– AND of literals
– Four product terms: a’bc, abc’, ab, c
• Sum term
– OR of literals
– No sum terms
• Sum-of-products
– Equation written as OR of product terms only
– Above equation is in sum-of-products form. “F = (a+b)c + d” is not.
Ve270 Introduction to Logic Design 3
Basic Theorems of Boolean Algebra
• (a) x + 0 = x; (b) x • 0 = 0; (theorem 1)
• (a) x + x’ = 1; (b) x • x’ = 0; (theorem 2)
• (a) x + x = x; (b) x • x = x; (theorem 3)
• (a) x + 1 = 1; (b) x • 1 = x; (theorem 4)
• (x’)’ = x; (involution)

Ve270 Introduction to Logic Design 4


Basic Theorems of Boolean Algebra
• (a) x + y = y + x; (b) xy = yx; (commutative)
• (a) x + (y + z) = (x + y) + z; (b) x(yz) = (xy)z; (associative)
• (a) x(y + z) = xy + xz; (b) x + yz = (x+y)(x+z); (distributive)
• (a) x + xy = x; (b) x(x + y) = x; (absorption)
• (a) xy + xy’ = x; (b) (x + y)(x + y’) = x (theorem 5)
• (a) x + x’y = x + y (b) x(x’ + y) = xy (theorem 6)

Ve270 Introduction to Logic Design 5


Operator Precedence
• The operator precedence for evaluating basic Boolean expressions is:
– Parenthesis
– NOT
– AND
– OR
• Example: (x + y)’
– Evaluate the parenthesized expression (x + y) first and then the
inversion
• Example: x + xy
– Evaluate xy first and then OR it with the value of x

Ve270 Introduction to Logic Design 6


Application of Basic Theorems

• Prove theorem 5(a): xy + xy’ = x


xy + xy’
= x(y + y’) (distributive (a))
= x • 1 Class Derivation (theorem 2(a) )
= x (theorem 4(b) )

Ve270 Introduction to Logic Design 7


Application of Basic Theorems

• Prove theorem 5(b): (x + y)(x + y’) = x


(x + y)(x + y’)
= x + yy’ (distributive (b))
= x + 0 Class Derivation (theorem 2(b) )
= x (theorem 1(a) )

Ve270 Introduction to Logic Design 8


Application of Basic Theorems

• Prove theorem 5(b): (x + y)(x + y’) = x, alternatively


(x + y)(x + y’)
= (x + y)x + (x + y)y’ (distributive (a))
= xx + xy + xy’ + yy’ (distributive (a))
= x + xy + xy’ + 0 (theorem 2(b), 3(b))
= x + x(y + y’) Class Derivation
(theorem 1(a), distributive (a))
= x+x (theorem 2(a), 4(b))
= x (theorem 3(a))

Ve270 Introduction to Logic Design 9


Application of Basic Theorems

• Prove theorem 6(a): x + x’y = x + y


x + x’y
= (x + x’)(x + y) (distributive (a) )
= 1 • (x + y) (theorem 2(a) )
= x + y Class Derivation (theorem 4(b) )

Ve270 Introduction to Logic Design 10


Application of Basic Theorems

• Exercises
1. x’y + x’
2. a’bc + a’
3. a’b’c + (a’b’c)’
4. (a + b)(c + b)(d’ + b)(acd’ + e)
5. wx’y’ + wxz’ + wx’yz’

Ve270 Introduction to Logic Design 11


DeMorgan’s Law

(a) (x + y)’ = x’y’


(b) (xy)’ = x’ + y’

• Very Useful

Ve270 Introduction to Logic Design 12


Applications of DeMorgan’s Law

• Find the complement of F = x(y’z’ + yz)


• F’ = (x(y’z’ + yz))’ (All steps by DeMorgan’s law)
= x’ + (y’z’ + yz)’
Class
= x’ +Derivation
(y’z’)’ • (yz)’
= x’ + (y + z)(y’ + z’)
• Exercise
((AB’ + C)D’ + E)’

Ve270 Introduction to Logic Design 13


XOR Properties
x  0 = x (a) x  1 = x’ (b) (theorem 1)
x  x = 0 (a) x  x’ = 1 (b) (theorem 2)
x  y’ = x’  y = (x  y)’ (theorem 3)
xy=yx (commutative)
(x  y)  z = x  (y  z) = x  y  z (associative)

Ve270 Introduction to Logic Design 14


Boolean Representation: Minterm and Maxterm

• A binary literal may be in the unprimed (true) form and primed (false)
forms, representing true and false conditions respectively
– E.g. a vs. a’
• Minterm is a product of n literals in which each literal appears exactly
once in either true or complemented form, but not both
– Minterm is represented by mi
• Maxterm is a sum of n literals in which each literal appears exactly once in
either true or complemented form, but not both
– Maxterm is represented by Mi

Ve270 Introduction to Logic Design 15


Minterm and Maxterm
Minterms Maxterms
x y z Term Designation Term Designation
0 0 0 x’y’z’ m0 x+y+z M0
0 0 1 x’y’z m1 x+y+z’ M1
0 1 0 x’yz’ m2 x+y’+z M2
0 1 1 x’yz m3 x+y’+z’ M3
1 0 0 xy’z’ m4 x’+y+z M4
1 0 1 xy’z m5 x’+y+z’ M5
1 1 0 xyz’ m6 x’+y’+z M6
1 1 1 xyz m7 x’+y’+z’ M7

Subscription i of minterm is the decimal equivalent of the corresponding


binary combination
Ve270 Introduction to Logic Design 16
Minterm in Truth Table
x y z F Result will happen if con1 is false AND
con2 is false AND con3 is true  x’y’z
con1 con2 con3 result
0 0 0 0 Result will happen if con1 is false AND
0 0 1 1 con2 is true AND con3 is true  x’yz

0 1 0 0 Result will happen if con1 is true AND


0 1 1 1 con2 is false AND con3 is false  xy’z’

1 0 0 1 Result will happen if con1 is true AND


1 0 1 1 con2 is false AND con3 is true  xy’z
1 1 0 0
Result will happen if any of these four
1 1 1 0 cases happens, implying an OR logic,
This relationship is expressed by:
F = x’y’z + x’yz + xy’z’ + xy’z

Ve270 Introduction to Logic Design 17


Minterm Expression From Truth Table
• A Boolean Equation can be derived from a truth table and expressed as a
sum-of-minterms (standard-sum-of-products)
• The minterms chosen in the sum-of-minterms expression are those
which produce a logic 1 for the corresponding output
• Example: x y z F
F = x’y’z + x’yz + xy’z’ + xy’z con1 con2 con3 result
Class
= m1 + m3 + m4 + m5 0 0 0 0

Derivation
=  m(1, 3, 4, 5) 0 0 1 1
0 1 0 0
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 0
1 1 1 0
Ve270 Introduction to Logic Design 18
Exercise
• Find minterm logic equation from these truth table
W X Y Z F
0 0 0 0 1 m0 W’X’Y’Z’
x y z F
0 0 0 1 0 m1 W’X’Y’Z
0 0 0 1 0 0 1 0 0 m2 W’X’YZ’
0 0 Class
1 0 Exercise 0
0
0 1 1
1 0 0
1
0
m3
m4
W’X’YZ
W’XY’Z’
0 1 0 0
1- 3 mins
0 1 0 1 0 m5 W’XY’Z
0 1 1 0 0 m6 W’XYZ’
0 1 1
0 1 1 1 1 m7 W’XYZ
1 0 0 0 1 0 0 0 1 m8 WX’Y’Z’
1 0 1 1 Class 1 0 0 1 0 m9 WX’Y’Z
1 0 1 0 0 m10 WX’YZ’
1 1 0 1
1 Derivation
1 0 1 1 0 m11 WX’YZ
1 1 0 1 1 0 0 0 m12 WXY’Z’
1 1 0 1 0 m13 WXY’Z
1 1 1 0 0 m14 WXYZ’
1 1 1 1 1 m15 WXYZ

Ve270 Introduction to Logic Design 19


Minterms and Maxterms

• The complement of Minterm is the corresponding


Maxterm, vice versa
– mi’ = Mi
– e.g.: m0 = x’y’z’
m0’ = (x’y’z’)’ = x + y + z = M0 (DeMorgan’s)
• Conversion between Standard Forms
– the term numbers missing from one form will be the term numbers used
in the other form
– e.g.: if all the terms are indexed by 0 ~ 7, then
F = Σ m(1, 2, 4, 7) = Π M(0, 3, 5, 6)

Ve270 Introduction to Logic Design 20


Minterms and Maxterms
• Example: In the given truth table, F1 is output of a 3-input device

Truth Table Sum-of-minterms Product-of-maxterms

x y z F1
0 0 0 0 F1 = x’y’z + xy’z’ + xy’z F1 = (x+y+z) • (x+y’+z) •
xyz’ + xyz (x+y’+z’)
0 0 1 1
0 1 0 0 Class
F1 = m1+m4+m5+m6+m7 Class
F1 = M0 • M2 • M3
0 1 1 0
1 0 0 1 Derivation
F1 = Σ (1, 4, 5, 6, 7)
Derivation
F1 = Π (0, 2, 3)
1 0 1 1
1 1 0 1
1 1 1 1

Ve270 Introduction to Logic Design 21


Incompletely Specified Functions

• In a circuit, some input


x y z F
conditions may never happen,
then the output is not 0 0 0 0
completely specified 0 0 1 1
• The corresponding output is 0 1 0 X
designated as “x”, called don’t 0 1 1 1
care 1 0 0 1
• A don’t care output could be 1 0 1 X
either 0 or 1 1 1 0 0
• F =  m(1, 3, 4) with d(2, 5) 1 1 1 0

Ve270 Introduction to Logic Design 22


Simplified Forms

• The minterm and maxterm forms can be further simplified


– Boolean function may contain less number of terms
– Each term may have less literals
– e.g.:

Simplified SOP
F1 = x + y’z
Why to simplify? &
Simplified POS
F1 = (x + y’)(x + z)
How to?

– Why?
– How to? Boolean theorems. And more….

Ve270 Introduction to Logic Design 23

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