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Deld Lab Experiment - 6

The document outlines an experiment focused on implementing logic functions using multiplexer IC 7415 and demultiplexer with logic gates. It details the objectives, design requirements, and theoretical background of multiplexers and demultiplexers, including their applications and differences. The experiment includes designing a 4:1 multiplexer, verifying functional tables, and implementing Boolean functions using specific ICs.
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0% found this document useful (0 votes)
2 views7 pages

Deld Lab Experiment - 6

The document outlines an experiment focused on implementing logic functions using multiplexer IC 7415 and demultiplexer with logic gates. It details the objectives, design requirements, and theoretical background of multiplexers and demultiplexers, including their applications and differences. The experiment includes designing a 4:1 multiplexer, verifying functional tables, and implementing Boolean functions using specific ICs.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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MIT SCHOOL OFCOMPUTING

Experiment No:6

Title: Implementation of logic functions using multiplexer IC 7415 &


Demultiplexer using Logic gates
After completion of this experiment students will be able to:
➢ familiarize with the structure and the operation of Multiplexer, Demultiplexer
➢ differentiate between Multiplexer, Demultiplexer depending upon number of inputs, outputs
and select lines.
➢ implement logical functions using multiplexer and demultiplexer.
➢ learn how to implement a large multiplexer using a small Multiplexer as the building block.
➢ minimize the hardware by using MUX.
➢ recognize demux as a data distributor and mux as a data selector.

Aim:
➢ Design and Implement 4:1 Mux using Logic gates.
➢ Verification of Functional table of IC 74153.
➢ Verification of Sum of Product (SOP) and Product of Sum (POS) with the help of given
Boolean expression.
a. Y = ∑m (1, 2, 3)
b. Y = ∏ M (0, 2)
➢ Implement the following Boolean Function using single 4:1 Mux.
F (A, B, C) = ∑m (1,3,5,6)
➢ Design and Implement 1:2 Demux using Logic gates.

Apparatus: Digital trainer kit, connecting wires, IC 74153, IC 7408,IC 7432, IC 7400.
Theory:
1. Multiplexer

Fig.1: Block diagram of Multiplexer


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MIT SCHOOL OFCOMPUTING

• Multiplexer is a digital switch which allows digital information from several sources to be routed
onto a single output line. Basic multiplexer has several data inputs and a single output line.
• The selection of a particular input line is controlled by a set of selection line.
• There are 2n input lines & n is the number of selection line whose bit combinations determines
which input is selected. It is “Many into One”.

2. Significance and application of multiplexer

• No need to simplify logic expression.


• The IC package count is minimized.
• Logic design is simplified.
• It is possible to expand the range of inputs for multiplexers beyond the available Range in the
integrated circuits. This can be accomplished by interconnecting several multiplexers.
• So it is used in the data acquisition circuit
• In designing the combinational circuit
• To minimize number of connections in communication system were we need to handle thousands
of connections. Ex. Telephone exchange

3. Demultiplexer.

• Demultiplexer is a logic used to perform exactly reverse function performed by multiplexer.


• It accepts a single input and distributes among several outputs.
• The selection of a particular output line is controlled by a set of selection line.
• There are n input lines & 2m is the number of selection line whose bit combinations determine
which output to be selected.

4. Difference between Mux / Demux / Decoder.

Point Multiplexer Demultiplexer Decoder


Input Many input lines Single input line Many inputs line also Acts
as select line
Output Single output line Many outputs line Many outputs line,
Active low output
Select line 2m = n n = 2m Enable inputs used

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MIT SCHOOL OFCOMPUTING

Design:
1. Design and Implement 4:1 Mux using Logic gates.
Theory:
4x1 Multiplexer has four data inputs D0, D1, D2 & D3 two selection lines S1 & S0 and one output Y.
One of these 4 inputs will be connected to the output based on the combination of inputs present at
these two selection lines. Truth table of 4x1 Multiplexer is shown below.

Selection Lines Output

S1 S0 Y

0 0 D0

0 1 D1

1 0 D2

1 1 D3

From Truth table, we can directly write the Boolean function for output, Y as

𝑌 = (𝑆1′ 𝑆0′ )𝐷0 + (𝑆1′ 𝑆0 )𝐷1 + (𝑆1 𝑆0′ )𝐷2 + (𝑆1 𝑆0 )𝐷3
We can implement this Boolean function using Inverters, AND gates & OR gate.

Fig.2: Implementation Of 4:1 Using Basic Gates

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MIT SCHOOL OFCOMPUTING

2. Verification of Functional table of IC 74153

3. Verification of Sum of Product (SOP) and Product of Sum (POS) with the help of given
Boolean expression.
a) Y = ∑m (1, 2, 3)
b) Y = ∏ M (0, 2)

a) Y = ∑m (1, 2, 3) Sum of Product Form (SOP)


Truth Table:
INPUTS Output
A B Y
0 0 0
0 1 1
1 0 1
1 1 1
Logic Diagram:

Fig.3: Logic Diagram


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MIT SCHOOL OFCOMPUTING
Hardware Requirement:

Sr. No. IC Description Quantity

1 74153 Dual 4:1MUX 01

b) Y = ∏ M (0, 2) Product of Sum Form (POS)

Truth Table:
INPUTS Output
A B Y
0 0 0
0 1 1
1 0 0
1 1 1

Logic Diagram:

Fig.4: Logic Diagram


Hardware Requirement :

Sr. No. IC Description Quantity

1 74153 Dual 4:1MUX 01

4. Implement the following Boolean Function using single 4:1 Mux.


F (A, B, C) = ∑m (1, 3, 5, 6)
Truth Table:

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MIT SCHOOL OFCOMPUTING

A B C F
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 0

We have to design using 4:1 Mux only hence we use Hardware Reduction Method.

Implementation Table:

D0 D1 D2 D3
A’ 0 1 2 3
A 4 5 6 7
Final I/P to MUX 0 1 A A’

Logic Diagram:

Fig.5: Logic Diagram

Hardware Requirement:

Sr. No. IC Description Quantity

1 74153 Dual 4:1MUX 01

2 7404 Hex Inverter 01

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MIT SCHOOL OFCOMPUTING

5. Implementation of 1:2 Demultiplexer using Logic Gates:

Fig.7: Logic Diagram and Truth table


Hardware Requirement:

Sr. No. IC Description Quantity

1 7408 AND Gate 01


2 7400 NAND Gate 01

Conclusion:
▪ Multiplexer is used as a data selector to select one out of many data inputs.
▪ Demultiplexer is used as data distributor to select input to output side.
▪ It is used for simplification of logic design.
▪ It is used to design combinational circuit.
References:
1. R.P.Jain, ‘Modern digital electronics’, 3rd edition, Tata McGraw Hill publication.
2. James W. Bignell, Robert Donovan, ‘Digital Electronics’, 5th edition, Cengage Learning
publication.
3. Malvino, Leach, Saha ‘Digital Principles and Applications’, 6th edition, Tata McGraw Hill
publication.

7 | 57 DELD LAB MANUAL Computer Science and Engineering

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