Electronic Devices and Circuits

MOS Field-Effect Transistors (MOSFETs)

Lecture 1
IV Characteristics of MOSFET

Prepared By: Muhammad Abdullah

muhammad.abdullah@nu.edu.pk , uetian.09@gmail.com

National University FAST (CFD Campus)

My YouTube Channel:
https://www.youtube.com/@BlueFish506

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Device Structure and Physical Operation of MOSFETs

Overview: The enhancement-type MOSFET (Metal-Oxide-Semiconductor Field-

Effect Transistor) is commonly used. It has a four-terminal structure: Gate (G),
Source (S), Drain (D), and Body (B).

Figure 1: Physical structure of the enhancement-type NMOS transistor: (a) perspective view;
(b) cross section

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Structure:

• Built on a p-type substrate, with heavily doped n-type regions for source and
drain.
• A thin silicon dioxide (SiO₂) layer acts as an insulator, with the gate electrode
placed on top of it.
• Metal contacts connect to the source, drain, and substrate.

Operation Principles:
• The MOSFET, also called IGFET (Insulated-Gate FET), features a gate
isolated by the oxide layer, which minimizes gate current (~10⁻¹⁵ A).
• Reverse-biased pn junctions at the source and drain keep the substrate
electrically isolated.
• By connecting the substrate to the source, the device operates as a three-
terminal device (G, S, D).
• Applying voltage to the gate modulates current between source and drain
within a channel region of length L and width W.
• The MOSFET is symmetrical, allowing interchangeability of source and
drain.
Operation with Zero Gate Voltage
• With zero gate voltage, two back-to-back diodes (formed by the pn junctions)
exist between the source and drain, resulting in high resistance (≈10¹² Ω) and
preventing current flow from drain to source.
Creating a Channel for Current Flow
• Applying a positive gate voltage repels holes in the p-type substrate, creating
a depletion region with uncovered negative charges.
• This gate voltage attracts electrons from the source and drain, forming an n-
type “inversion layer” or channel connecting the source and drain.

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 • The voltage VGS at which this conductive channel forms is called the
threshold voltage Vt, typically between 0.3 V and 1.0 V.

Figure 2: Enhancement-type NMOS transistor with a positive voltage applied to the gate. An
n channel is induced at the top of the substrate beneath the gate.

MOSFET as a Parallel-Plate Capacitor

• The gate and channel act as a capacitor, where positive gate voltage induces
a negative charge in the channel.

• Current flows through this channel when a drain-source voltage 𝑉𝐷𝑆 is

applied, with the fieldeffect transistor (FET) controlling this current by
modulating the channel’s conductivity.

Effective Voltage (Overdrive Voltage)

• The difference 𝑉𝑂𝑉 = 𝑉𝐺𝑆 − 𝑉𝑡 is the overdrive voltage, determining the
amount of channel charge |𝑄| = 𝐶𝑜𝑥 (𝑊𝐿)𝑉𝑂𝑉 , where 𝐶𝑜𝑥 is the oxide
capacitance.

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 𝜀𝑜𝑥
𝐶𝑜𝑥 = , 𝜀𝑜𝑥 = 3.45 × 10−11 F/m
𝑡𝑜𝑥
where 𝜀𝑜𝑥 is the permittivity of the silicon dioxide. Oxide thickness 𝑡𝑜𝑥 is determined
by the process technology used to fabricate the MOSFET.
• Larger 𝑉𝑂𝑉 results in more charge, effectively deepening the channel.

Applying a Small 𝒗𝑫𝑺 in MOSFETs

• With a small drain-source voltage 𝑣𝐷𝑆 , a current 𝑖𝐷 flows through the n -
channel, carried by electrons moving from source to drain.

• Since 𝑣𝐷𝑆 is small, the voltage along the channel remains approximately
constant, equal to 𝑣𝑂𝑉 = 𝑣𝐺𝑆 − 𝑉𝑡 .

Figure 3: NMOS transistor with 𝒗𝑪𝑺 > 𝑽𝒕 and with a small 𝒗𝑫𝑺 applied

• The current 𝑖𝐷 is proportional to 𝑣𝐷𝑆 and is given by:

𝑊
𝑖𝐷 = (𝜇𝑛 𝐶𝑜𝑥 ) 𝑣𝑂𝑉 𝑣𝐷𝑆
𝐿
• For small 𝑣𝐷𝑆 , the MOSFET behaves as a linear resistor with conductance
𝑔𝐷𝑆 :

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 𝑊 𝑊
𝑔𝐷𝑆 = (𝜇𝑛 𝐶𝑜𝑥 ) 𝑣𝑂𝑉 = (𝜇𝑛 𝐶𝑜𝑥 ) (𝑣𝐺𝑆 − 𝑉𝑡 )
𝐿 𝐿
Key Parameters and Equations
• Process Transconductance Parameter 𝑘𝑛′ = 𝜇𝑛 𝐶𝑜𝑥
𝑊
• Transconductance Parameter 𝑘𝑛 = 𝑘𝑛′ ( )
𝐿

• MOSFET resistance 𝑟𝐷𝑆 :

1 1
𝑟𝐷𝑆 = =
𝑔𝐷𝑆 (𝜇𝑛 𝐶𝑜𝑥 )(𝑊/𝐿)𝑣𝑂𝑉

Figure 4: 𝒊𝑫 vs. 𝒗𝑫𝑺 MOSFET’s characteristics

The MOSFET’s 𝑖𝐷 vs. 𝑣𝐷𝑆 curve shows a linear increase in 𝑖𝐷 with 𝑣𝐺𝑆 , controlled
by 𝑣𝑂𝑉 , establishing the MOSFET as a voltage-controlled resistor for small 𝑣𝐷𝑆 .

The description above indicates that for the MOSFET to conduct, a channel has to
be induced. Then, increasing 𝑣𝐺𝑆 above the threshold voltage 𝑉𝑡 enhances the
channel, hence the names enhancement-mode operation and enhancement-type
MOSFET. Finally, we note that the current that leaves the source terminal (𝑖𝑆 ) is
equal to the current that enters the drain terminal (𝑖𝐷 ), and the gate current 𝑖𝐺 = 0.

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Operation as 𝒗𝑫𝑺 Increases:

Figure 5: 𝒊𝑫 versus 𝒗𝑫𝑺 for an e-type NMOS transistor operated with 𝒗𝑮𝑺 = 𝑽𝒕 + 𝑽𝑶𝑽

The current 𝑖𝐷 in this Triode region is semi-parabolic and given by:

𝑊 1
𝑖𝐷 = 𝑘𝑛′ ( ) (𝑉𝑂𝑉 − 𝑣𝐷𝑆 ) 𝑣𝐷𝑆
𝐿 2
𝑊 1 2
𝑖𝐷 = 𝑘𝑛′ ( ) ((𝑣𝐺𝑆 − 𝑉𝑡 )𝑣𝐷𝑆 − 𝑣𝐷𝑆 )
𝐿 2

Operation for 𝒗𝑫𝑺 ≥ 𝑽𝑶𝑽 (Saturation Region)

• When 𝑣𝐷𝑆 reaches 𝑉𝑂𝑉 , the channel depth at the drain end reduces to zero,
causing channel pinch-off.

• Any further increase in 𝑣𝐷𝑆 does not affect the current, and the MOSFET
enters the saturation region.

• The drain current 𝑖𝐷 in saturation is given by:

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 1 𝑊 2
𝑖𝐷 = 𝑘𝑛′ ( ) 𝑉𝑂𝑉
2 𝐿
1 𝑊
𝑖𝐷 = 𝑘𝑛′ ( ) (𝑣𝐺𝑆 − 𝑉𝑡 )2
2 𝐿
• Saturation Voltage:
𝑉𝐷𝑆𝑠𝑎𝑡 = 𝑉𝑂𝑉 = 𝑣𝐺𝑆 − 𝑉𝑡
In saturation, 𝑖𝐷 remains constant despite increases in 𝑣𝐷𝑆 , defining the MOSFET’s
operation as a current source.

Example 1

Consider a process technology for which 𝐿min = 0.4𝜇 m, 𝑡𝑜𝑥 = 8 nm, 𝜇𝑛 =

450 cm2 /V ⋅ s, and 𝑉𝑡 = 0.7 V.

a) Find 𝐶𝑜𝑥 and 𝑘𝑛′ .

b) For a MOSFET with 𝑊/𝐿 = 8𝜇m/0.8𝜇 m, calculate the values of 𝑉𝑂𝑉 , 𝑉𝐺𝑆 ,
and 𝑉𝐷𝑆min needed to operate the transistor in the saturation region with a dc
current 𝐼𝐷 = 100𝜇 A.
c) For the device in (b), find the values of 𝑉𝑂𝑉 and 𝑉𝐺𝑆 required to cause the
device to operate as a 1000- Ω resistor for very small 𝑣𝐷𝑆 .

Solution:

Part (a)
𝜀𝑜𝑥 3.45 × 10−11
𝐶𝑜𝑥 = = = 4.32 × 10−3 F/m2
𝑡𝑜𝑥 8 × 10−9
As 1𝜇m = 10−6 𝑚  1𝑚 = (106 𝜇m)
𝐹 𝐹
𝐶𝑜𝑥 = 4.32 × 10−3 = 4.32 × 10 −15
= 4.32f F/(𝜇m)2
(106 𝜇m)2 (𝜇m)2
1𝑐𝑚 = 10−2 𝑚  1 cm2 = 10−4 𝑚2

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𝜇𝑛 = 450( cm2 /Vs) = 450 × 10−4 𝑚2 /𝑉𝑠
𝑘𝑛′ = 𝜇𝑛 𝐶𝑜𝑥 = (450 × 10−4 𝑚2 /𝑉𝑠) × (4.32 × 10−3 F/m2 )
𝑘𝑛′ = 194 × 10−6 (𝐹/𝑉𝑠) = 194 𝑢𝐴/𝑉 2

Part (b)
1 𝑊
𝐼𝐷 = 𝑘𝑛′ 𝑣 2
2 𝐿 𝑂𝑉
1 8𝑢 2
100𝑢 = × 194𝑢 × 𝑉
2 0.8𝑢 𝑂𝑉
2
100 = 970 𝑉𝑂𝑉

100
𝑉𝑂𝑉 = √ = 0.32 V
970

𝑉𝐺𝑆 = 𝑉𝑡 + 𝑉𝑂𝑉 = 0.7 + 0.32 = 1.02 V

𝑉𝐷𝑆min = 𝑉𝑂𝑉 = 0.32 V

Part (c)
1
𝑟𝐷𝑆 =
𝑊
𝑘𝑛′ 𝑉
𝐿 𝑂𝑉
1
1000 =
8𝑢
194 × 10−6 × × 𝑉𝑂𝑉
0.8𝑢
1
𝑉𝑂𝑉 = = 0.52 𝑉
8𝑢
194 × 10−6 × × 1000
0.8𝑢
𝑉𝐺𝑆 = 𝑉𝑡 + 𝑉𝑂𝑉 = 0.7 + 0.52 = 1.22 V

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Example 2

A 0.18𝜇m fabrication process is specified to have 𝑡𝑜𝑋 = 4 nm, 𝜇𝑛 = 450 cm2 /V ⋅

s, and 𝑉𝑡 = 0.5 V.

a) Find the value of the process transconductance parameter 𝑘𝑛′ .

b) For a MOSFET with minimum length fabricated in this process, find the
required value of 𝑊 so that the device exhibits a channel resistance 𝑟𝐷𝑆 of
1kΩ at 𝑣𝐺𝑆 = 1 V

Solution:
Part (a)
𝜖𝑜𝑥 34.5pF/m 34.5 × 10−12 𝐹/𝑚
𝐶𝑜𝑥 = = = = 8.625 × 10−3 𝐹/𝑚2
𝑡𝑜𝑥 4 nm 4 × 10−9 𝑚
As 1𝜇m = 10−6 𝑚  1𝑚 = (106 𝜇m)
𝐹 𝐹
𝐶𝑜𝑥 = 8.625 × 10−3 = 8.625 × 10 −15
= 8.625 fF/(𝜇m)2
(106 𝜇m)2 (𝜇m)2
1𝑐𝑚 = 10−2 𝑚  1 cm2 = 10−4 𝑚2
𝜇𝑛 = 450( cm2 /Vs) = 450 × 10−4 𝑚2 /𝑉𝑠
𝑘𝑛′ = 𝜇𝑛 𝐶𝑜𝑥 = (450 × 10−4 𝑚2 /𝑉𝑠) × (8.625 × 10−3 F/m2 )
𝑘𝑛′ = 388 × 10−6 (𝐹/𝑉𝑠) = 388 𝑢𝐴/𝑉 2
Part (b)
𝑉𝑂𝑉 = 𝑣𝐺𝑆 − 𝑉𝑡 = 1 − 0.5 = 0.5 V
1 𝑊
𝑔𝐷𝑆 = = 𝑘𝑛′ 𝑉
𝑟𝐷𝑆 𝐿 𝑂𝑉
1 𝑊
= 𝑘𝑛′ 𝑉
1kΩ 𝐿 𝑂𝑉
𝑊
1𝑚 = 388𝑢 × 0.5
𝐿

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𝑊 1𝑚
= = 5.15
𝐿 0.5 × 388𝑢
𝐿 = 0.18𝜇 m, so 𝑊 = 0.93𝜇 m

Current–Voltage Characteristics

Figure 6: Circuit symbols for the 𝒏-channel enhancement-type MOSFET

𝒊𝑫 − 𝒗𝑫𝑺 Characteristics:

Figure 7: 𝒊𝑫 − 𝒗𝑫𝑺 characteristics for an enhancement-type NMOS transistor

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Figure 8: relative levels of the terminal voltages of the enhancement NMOS transistor for
operation in the triode region and in the saturation region

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𝒊𝑫 − 𝒗𝑮𝑺 Characteristics:

Figure 9: 𝒊𝑫 − 𝒗𝑮𝑺 characteristic of an NMOS transistor operating in the saturation region

• When used in amplifier design, the MOSFET operates in the saturation region,
where the drain current 𝑖𝐷 is controlled by 𝑣𝐺𝑆 (or 𝑣𝑂𝑉 ) and remains
independent of 𝑣𝐷𝑆 .

• In this mode, the MOSFET acts as a voltage-controlled current source.

Key Equations for 𝑖𝐷 :

1 𝑊 1 𝑊 2
𝑖𝐷 = 𝑘𝑛 ( ) (𝑣𝐺𝑆 − 𝑉𝑡𝑛 )2 = 𝑘𝑛 ( ) 𝑣𝑂𝑉
2 𝐿 2 𝐿

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Example 3

For a 0.8𝜇m process technology for which 𝑡𝑜𝑥 = 15 nm and 𝜇𝑛 = 550 cm2 /Vs,
Find

a) 𝐶𝑜𝑥 , 𝑘𝑛′
b) The overdrive voltage 𝑉𝑂𝑉 required to operate a transistor having 𝑊/𝐿 = 20
in saturation with 𝐼𝐷 = 0.2 mA. What is the minimum value of 𝑉𝐷𝑆 needed?

Solution:
Part (a)
𝜖𝑜𝑥 34.5pF/m 34.5 × 10−12 𝐹/𝑚
𝐶𝑜𝑥 = = = −9
= 2.3 × 10−3 𝐹/𝑚2
𝑡𝑜𝑥 15 nm 15 × 10 𝑚
As 1𝜇m = 10−6 𝑚  1𝑚 = (106 𝜇m)
𝐹 𝐹
𝐶𝑜𝑥 = 2.3 × 10−3 6 2
= 2.3 × 10 −15
2
= 2.3 fF/(𝜇m)2
(10 𝜇m) (𝜇m)
1𝑐𝑚 = 10−2 𝑚  1 cm2 = 10−4 𝑚2
𝜇𝑛 = 550( cm2 /Vs) = 550 × 10−4 𝑚2 /𝑉𝑠
𝑘𝑛′ = 𝜇𝑛 𝐶𝑜𝑥 = (550 × 10−4 𝑚2 /𝑉𝑠) × (2.3 × 10−3 F/m2 )
𝑘𝑛′ = 1265 × 10−7 (𝐹/𝑉𝑠) = 126.5 𝑢𝐴/𝑉 2
Part (b)
Drain current in saturation region is defined as;
1 𝑊 2
𝐼𝐷 = 𝑘𝑛′ 𝑉
2 𝐿 𝑂𝑉
1 2
0.2𝑚 = × 126.5𝑢 × 20 × 𝑉𝑂𝑉
2
2
0.2𝑚 = 1265𝑢 × 𝑉𝑂𝑉

2
0.2𝑚 0.2𝑚
𝑉𝑂𝑉 = = = 0.158
1265𝑢 1.265𝑚

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 𝑉𝑂𝑉 = √0.158 = 0.4 𝑉
𝑉𝐷𝑆,min = 𝑉𝑂𝑉 = 0.4 V, for saturation

Example 4

Consider an NMOS transistor fabricated in a 0.18𝜇m process with 𝐿 = 0.18𝜇 m and

𝑊 = 2𝜇 m. The process technology is specified as 𝐶𝑜𝑥 = 8.6fF/𝜇m2 , 𝜇𝑛 =
450 cm2 /Vs, and 𝑉𝑡𝑛 = 0.5 V.

a) Find 𝑉𝐺𝑆 and 𝑉𝐷𝑆 that result in the MOSFET operating at the edge of saturation
with 𝐼𝐷 = 100𝜇 A.
b) If 𝑉𝐺𝑆 is kept constant, find 𝑉𝐷𝑆 that results in 𝐼𝐷 = 50𝜇 A.
c) To investigate the use of the MOSFET as a linear amplifier, let it be operating
in saturation with 𝑉𝐷𝑆 = 0.3 V. Find the change in 𝑖𝐷 resulting from 𝑣𝐺𝑆
changing from 0.7 V by +0.01 V and by -0.01 V.

Solution:
First we determine the process transconductance parameter 𝑘𝑛′ ;
𝑘𝑛′ = 𝜇𝑛 𝐶𝑜𝑥 = 450 × 10−4 × 8.6 × 10−15 × 1012 A/V 2 = 387𝜇 A/V 2
and the transistor transconductance parameter 𝑘𝑛 ,
𝑊 2
𝑘𝑛 = 𝑘𝑛′ ( ) = 387 ( ) = 4.3 mA/V 2
𝐿 0.18

Part (a)
1 2
𝐼𝐷 = 𝑘𝑛 𝑉𝑂𝑉
2
1 2
100𝑢 = × 4.3𝑚 × 𝑉𝑂𝑉
2

200𝑢
𝑉𝑂𝑉 = √ = 0.22 𝑉
4.3𝑚

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𝑉𝐺𝑆 = 𝑉𝑡𝑛 + 𝑉𝑂𝑉 = 0.5 + 0.22 = 0.72 V
At the edge of saturation, 𝑉𝐷𝑆 = 𝑉𝑂𝑉 = 0.22 V

Part (b)
With 𝑉𝐺𝑆 kept constant at 0.72 V and 𝐼𝐷 reduced from the value obtained at the edge
of saturation, the MOSFET will now be operating in the triode region, thus
1 2
𝐼𝐷 = 𝑘𝑛 [𝑉𝑂𝑉 𝑉𝐷𝑆 − 𝑉𝐷𝑆 ]
2
1 2
50𝑢 = 4.3𝑚 [0.22𝑉𝐷𝑆 − 𝑉𝐷𝑆 ]
2
2
𝑉𝐷𝑆 − 0.44𝑉𝐷𝑆 + 0.023 = 0
This quadratic equation has two solutions: 𝑉𝐷𝑆 = 0.06 V and 𝑉𝐷𝑆 = 0.39 V
As device is operating in triode region, so 𝑉𝐷𝑆 should be less than 𝑉𝑂𝑉 . Thus we
have; 𝑉𝐷𝑆 = 0.06 V

Part (c)
For 𝑣𝐺𝑆 = 0.7 V, 𝑉𝑂𝑉 = 0.2 V, and since 𝑉𝐷𝑆 = 0.3 V, the transistor is operating in
saturation;
1 2
1
𝐼𝐷 = 𝑘𝑛 𝑉𝑂𝑉 = × 4.3𝑚 × (0.2)2 = 86 𝜇A
2 2

For 𝑉𝐺𝑆 = 0.71 V  𝑉𝑂𝑉 = 𝑉𝐺𝑆 − 𝑉𝑡𝑛 = 0.71 − 0.5 = 0.21 V

1
𝐼𝐷 = × 4.3𝑚 × (0.21)2 = 94.8 𝜇A
2
Now for 𝑉𝐺𝑆 = 0.69 V  𝑉𝑂𝑉 = 𝑉𝐺𝑆 − 𝑉𝑡𝑛 = 0.69 − 0.5 = 0.19 V
1
𝐼𝐷 = × 4.3𝑚 × (0.19)2 = 77.6 𝜇A
2
Thus, with Δ𝑉𝐺𝑆 = +0.01 V, Δ𝐼𝐷 = 94.8𝑢 − 86𝑢 = 8.8 𝜇A
and for Δ𝑉𝐺𝑆 = −0.01 V, Δ𝐼𝐷 = 77.6𝑢 − 86𝑢 = −8.4 𝜇A

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Example 4

An NMOS transistor is operating at the edge of saturation with an overdrive voltage

𝑉𝑂𝑉 and a drain current 𝐼𝐷 . If 𝑉𝑂𝑉 is doubled, and we must maintain operation at the
edge of saturation, what should 𝑉𝐷𝑆 be changed to? What value of drain current
results?
Solution:
At the edge of saturation: 𝑉𝐷𝑆 = 𝑉𝑂𝑉
If 𝑉𝑂𝑉 is doubled, then new 𝑉𝐷𝑆 should also be doubled i.e. 𝑉𝐷𝑆,𝑛𝑒𝑤 = 2𝑉𝑂𝑉
1 𝑊 2
𝐼𝐷,𝑛𝑒𝑤 = 𝑘𝑛′ 𝑉
2 𝐿 𝑂𝑉,𝑛𝑒𝑤
1 𝑊 1 𝑊 2
𝐼𝐷,𝑛𝑒𝑤 = 𝑘𝑛′ (2𝑉𝑂𝑉 )2 = 4 ( 𝑘𝑛′ 𝑉 ) = 4𝐼𝐷
2 𝐿 2 𝐿 𝑂𝑉
So, drain current will increase by factor of 4.

Example 5

An 𝑛-channel MOSFET operating with 𝑉𝑂𝑉 = 0.5 V exhibits a linear resistance

𝑟𝐷𝑆 = 1kΩ when 𝑣𝐷𝑆 is very small.

a) What is the value of the device transconductance parameter 𝑘𝑛 ?

b) What is the value of the current 𝐼𝐷 obtained when 𝑣𝐷𝑆 is increased to 0.5 V ?
and to 1 V ?

Solution:
𝑉𝑂𝑉 = 0.5 V
1 1
𝑔𝐷𝑆 = = = 1𝑚 𝐴/𝑉
𝑟𝐷𝑆 1kΩ
𝑊 𝑊
𝑔𝐷𝑆 = 𝑘𝑛′ 𝑉 = 𝑘𝑛 𝑉𝑂𝑉  𝑘𝑛 = 𝑘𝑛′
𝐿 𝑂𝑉 𝐿

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 𝑔𝐷𝑆 1𝑚
𝑘𝑛 = = = 2 mA/V 2
𝑉𝑂𝑉 0.5
For 𝑉𝐷𝑆 = 0.5 V = 𝑉𝑂𝑉 , the transistor operates in saturation
1 𝑊 2 1 2
1
𝐼𝐷 = 𝑘𝑛′ 𝑉𝑂𝑉 = 𝑘𝑛 𝑉𝑂𝑉 = × 2𝑚 × (0.5)2 = 0.25 mA
2 𝐿 2 2
For 𝑉𝐷𝑆 = 1 V, the transistor is still in operates in saturation and drain current is
constant in saturation mode so 𝐼𝐷 = 0.25 mA

Finite Output Resistance in Saturation

Figure 10: Effect of vDS on iD

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 Figure 11: Large-signal equivalent circuit model of the n-channel MOSFET in saturation

Channel-Length Modulation:
• In saturation, 𝑖𝐷 is ideally independent of 𝑣𝐷𝑆 . However, as 𝑣𝐷𝑆 increases,
the channel pinch-off point moves, shortening the channel length (𝐿 − Δ𝐿).
This is known as channel length modulation.

• This effect is modeled by including a factor (1 + 𝜆𝑣𝐷𝑆 ) in the expression for

𝑖𝐷 , where 𝜆 is the channel-length modulation parameter.

Drain Current with Channel-Length Modulation:

1 𝑊
𝐼𝐷 = 𝑘𝑛′ (𝑣 − 𝑉𝑡𝑛 )2 (1 + 𝜆𝑣𝐷𝑆 )
2 𝐿 𝐺𝑆
where 𝜆 is inversely proportional to 𝐿 and increases with shorter channels.
Early Voltage (𝑽𝑨 ) and Output Resistance:
1
𝑉𝐴 = represents the intercept of the extrapolated 𝑖𝐷 − 𝑣𝐷𝑆 curve.
𝜆
The output resistance 𝑟𝑜 is proportional to 𝑉𝐴 ;
1 𝑉𝐴 Δ𝑉𝐷𝑆
𝑟𝑜 = = =
𝜆𝐼𝐷 𝐼𝐷 Δ𝐼𝐷
Where 𝑉𝐴 is a device parameter with the dimensions of V
𝑉𝐴 = 𝑉𝐴′ × 𝐿
where 𝑉𝐴′ is entirely process-technology dependent with the dimensions of 𝑉/𝑢𝑚

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Channel-length modulation affects 𝑖𝐷 and introduces a finite 𝑟𝑜 in the MOSFET
large-signal model, impacting gain and performance in analog circuits.
Note:

1. 𝑟𝑜 is the output resistance in saturation mode, while 𝑟𝐷𝑆 is the output resistance
in triode mode.
1 𝑉𝐴
2. In 𝑟𝑜 = = , 𝐼𝐷 is the drain current without channel modulation effect
𝜆𝐼𝐷 𝐼𝐷

Example 6

An NMOS transistor is fabricated in a 0.4𝜇m process having 𝑘𝑛′ = 𝜇𝑛 𝐶𝑜𝑥 =

200𝜇 A/V 2 and 𝑉𝐴′ = 50 V/𝜇m of channel length. If 𝐿 = 0.8𝜇 m and 𝑊 = 16𝜇 m,
Find

a) 𝑉𝐴 and 𝜆
b) The value of 𝐼𝐷 that results when the device is operated with an overdrive
voltage 𝑉𝑂𝑉 = 0.5 V and 𝑉𝐷𝑆 = 1 V.
c) The value of 𝑟𝑜 at this operating point.
d) If 𝑉𝐷𝑆 is increased by 2V, what is the corresponding change in 𝐼𝐷 ?

Solution:

Part (a)
𝑉𝐴 = 𝑉𝐴′ × 𝐿 = 50 × 0.8 = 40 V
1
𝜆= = 0.025 V −1
𝑉𝐴

Part (b)
As 𝑉𝐷𝑆 = 1 V > 𝑉𝑂𝑉 = 0.5 V, so device is operating in Saturation mode. Drain
current in saturation with channel modulation effect is;

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 1 𝑊 2
𝐼𝐷 = 𝑘𝑛′ 𝑉 (1 + 𝜆𝑉𝐷𝑆 )
2 𝐿 𝑂𝑉
1 16𝜇
𝐼𝐷 = × 200𝜇 × × 0.52 (1 + 0.025 × 1) = 0.51 𝑚𝐴
2 0.8𝜇

Part (c)
𝐼𝐷 without channel-length modulation is;
1 𝑊 2 1 16𝜇
𝐼𝐷 = 𝐼𝐷 = 𝑘𝑛′ 𝑉𝑂𝑉 = × 200𝜇 × × 0.52 = 0.5 𝑚𝐴
2 𝐿 2 0.8𝜇
𝑉𝐴 40
𝑟𝑜 = = = 80 𝑘Ω
𝐼𝐷 0.5𝑚

Part (d)
Output resistance can be written as;
Δ𝑉𝐷𝑆
𝑟𝑜 =
Δ𝐼𝐷
Δ𝑉𝐷𝑆 2
Δ𝐼𝐷 = = = 0.025 𝑚𝐴
𝑟𝑜 80𝑘

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